Interrupted feedback cancellation in a radar system

ABSTRACT

In a radar system a canceller circuit including in one form a single delay means which produces an output signal having an order of cancellation equal to that of the canceller circuit using two delay means. Undelayed and delayed video or intermediate frequency inputs are coupled from a signal input to a subtractor. A first input of a summing circuit is connected between the signal input and the delay means, and the output of the subtractor is connected to a second input of the summing junction on alternate interpulse periods of the radar system.

0 United States Patent 1 91 1111 3,733,605 Osterman 1451 May 15, 1973 54 INTERRUPTED FEEDBACK 3,426,285 2/1969 Uhrig ..330 51 CANCELLATION IN A RADAR SYSTEM FOREIGN PATENTS OR APPLICATIONS [75] Inventor: Laurence Oliver Osterman, Utica,

763,195 12/1956 Great Britain ..343/7.'/

[ Assignee: General Electric p y, Utica, Primary Examiner-Benjamin A. Borchelt Assistant Examiner-G. E. Montone [22] Filed: Oct. 23, 1970 Attorney-Irving M. Freedman, Robert P. Cogan, Jose h B. Forman, Frank L. Neuhauser and Oscar 211 Appl. 110.; 83,325 vyadden 52 us. 01. ..343/7.7 ABSTRACT [51] Int. Cl ..G01s 9/42 In a radar s ystem a canceller circuit including in one [58] Fleld of Search form a single delay means which produces an output. signal having an order of cancellation equal to that of {56] References cued the canceller circuit using two delay means. Un-

UNITED STATES PATENTS delayed and delayed video or intermediate frequency 1nputs are coupled from a signal 1nput to a subtractor. 3,157,875 11/1964 Matsukasa et a1 ..343/7.7 A first input of a summing circuit is connected Sl et a1 3 ./75-Z between the signal input and the delay means, and the P er output of the subtract or is connected to a second 3,237,116 2/1966 Skmner etal ..330/51 UX input of e summing junction on alternate interpulse periods of the radar system.

8 Claims, 4 Drawing Figures 20 I5 2 22 DELAY r- 1 LINE I 23 ;\L|-25 18 L. J

INTERRUPTED FEEDBACK CANCELLATION IN A RADAR SYSTEM BACKGROUND OF THE INVENTION This invention relates to moving target indicator (MTI) radar systems, and more particularly to canceller circuits within such systems.

A moving target radar system is a system within which a response is provided which is indicative of the phase difference between successive echo pulses. Pulses reflected from a moving target have a different relative phase. The presence or absence of a moving target within the range of a radar antenna is determined by applying successive reflected pulses to a canceller circuit.

A conventional canceller circuit includes at least one canceller stage. A canceller stage includes a signal input terminal and a subtractor circuit which provides a cancelled output. A first input terminal of the subtractor circuit is directly coupled to the signal input terminal, and a delay line is coupled between the signal input terminal and a second input of the subtractor circuit. The delay period of the delay line must be equal to the time between successive pulses. Thus, if echo pulses are received from a stationary target, the successive reflected pulses cancel each other and a zero output is provided.

Since the canceller stage includes one delay line, the output has a first order cancellation. The order of cancellation may be increased by cascading a plurality of canceller stages to provide a significant improvement in rejection of signals returned from a stationary background other than the target, commonly known as clutter.

In prior circuits, this requires the use of at least another delay line, which may present several disadvantages. In both typical surveillance and typical airborne attack radar, analog delay lines are quite expensive, costing several thousands of dollars. Also, in airborne attack radar, both size and weight of a radar system are critical considerations, and the use of a plurality of delay lines increases both the size and the weight of the system.

Electronic disadvantages are also present. Where a plurality of delay lines are utilized in analog embodiments, complicated circuitry must be utilized to regulate the delay periods of both delay lines to assure that they both produce the same delay time. Further, the possibility of differing temperature stability of the delay lines may lead to different delay periods and hence lead to inaccuracy in the output signal. Thus, it is extremely desirable to provide a higher order of cancellation than that which is produced by a conventional canceller stage while not increasing the number of delay lines used.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a canceller circuit in which interrupted feedback or its equivalent is utilized to improve cancellation of the output.

It is another object of the present invention to provide in a moving target indicator radar system a canceller circuit providing a higher order of cancellation than the number of delay lines in which it includes.

It is a specific object of one form of the present invention to provide a canceller circuit providing second order cancellation while eliminating errors introduced due to nonuniformity in successive delay lines.

It is also an object of the present invention to provide a canceller circuit in a moving target radar providing greater than first order cancellation which is simple and inexpensive in construction compared to prior canceller circuits providing greater than first order cancellation.

Briefly stated, in accordance with the present invention, there is provided a canceller circuit for a moving target indicator radar system in which interrupted feedback is utilized to improve cancellation of the output. In one form of the invention, a signal input terminal is coupled directly and also by a delay means to first and second inputs of a subtractor circuit which provides an output. A summing circuit has a first input coupled to the signal input terminal and an output coupled to the input of the delay means. A second input of the summing circuit is coupled by switching means to the output of the subtractor circuit. Interrupted feedback is provided by closing the switching means during alternate interpulse periods of the radar system. During alternate interpulse periods of the radar system, the canceller circuit provides an output having second order cancellation. In other forms of the invention further canceller stages may be included in the canceller'circuit, and the interrupted feedback or an equivalent input connected to the input of a delay means may be provided in an alternative manner to improve cancellation of the output.

BRIEF DESCRIPTION OF THE DRAWINGS The foregoing objects and features of novelty which characterize the invention and the circuitry in which they are embodied are pointed out with particularity in the claims forming the concluding portion of the specification. The invention, both as to its organization and the manner of operation, may be further understood by reference to the following description taken in connection with the drawings.

Of the drawings:

FIG. 1 is a block diagrammatic representation of a canceller circuit constructed in accordance with the present invention and incorporated in a moving target radar indicator system;

FIG. 2 is a chart illustrating the operation of FIG. 1;

FIG. 3 is a block diagrammatic representation of another form of the present invention; and

FIG. 4 is a chart illustrative of the operation of the circuit of FIG. 3.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is illustrative of a canceller circuit 10 constructed in accordance with the present invention connected between a moving target indicator receiver 1 and a conventional moving target indicator display means 2. The canceller circuit 10 comprises a canceller stage and further circuitry described below. The radar system transmits a train of pulses, each pulse originating during a sweep of the radar system. A video or intermediate frequency input pulse train, indicative of successive received echo pulses, is applied from the receiver 1 to a signal input terminal 11. Signals are directly coupled from the signal input terminal 11 to a first input 14 of the subtractor 15 having an output terminal 17 coupled to an output terminal 13. The signals are also coupled to a second input 16 of the subtractor from the terminal I 1 via a delay means 18. The subtractor 15 operates in a conventional manner to provide a cancelled output at the output terminal 13. The delay means 18 may include a conventional delay line and any desired amplification circuitry in an analog embodiment. In a digital embodiment, the delay means 18 may comprise well-known shift registers.

In order to further implement the present invention. a summing circuit 20 is provided having a first input 21 coupled to the signal input terminal 11 and an output terminal 22 coupled to the input of the delay means 18. A switching means is coupled between the output terminal 13 and a second input 23 of the summing circuit 20. The switching means 25 is actuatable to connect the output at the terminal 13 to the second input 23 of the summing circuit 20. The switching means 25 is actuated, i.e., closed, during selected time periods, for example during alternate interpulse periods of the radar system and is actuated by any convenient means. For example, a dotted line is drawn from the switching means 25 from the receiver 1 to illustrate that in the embodiment of FIG. 1, switching means 25 is synchronized by the transmit-receive circuitry of the radar system. The selection of time periods. e.g.. whether during every other interpulse period or during some other interpulse periods, during which the switching means 25 is actuated is made by examining the mathematical form of the desired output of the canceller circuit 10. Operation of the Circuit The operation of the circuit of FIG. I is illustrated in FIG. 2. Successive pulses are transmitted during successive sweeps of the radar system. Successive pulses indicative of echo pulses are receivable at the signal input terminal 11 at times t (Time column. FIG. 2), each point in time spaced from the next by the period of one sweep of the radar circuit. Two successive points in time e.g., t r define one interpulse period. The Switch Condition column of FIG. 2 illustrates the condition of the switching means 25 during each interpulse period. The columns Terminal l1. Terminal l3, and Terminal 22 illustrate the outputs appearing respectively thereat at the end of each time period.

It is assumed that during a first sweep, the switching means 25 is open. During a second sweep, the switching means 25 is closed (i.e., actuated) so that interrupted feedback is applied from the output terminal 13 to the input of the summing circuit 20. Operation proceeds as illustrated in FIG. 2. The notation 1., and i is utilized to indicate successive time periods in a generalized expression. An output is provided at the output terminal 13 having a second order cancellation on alternate sweeps.

An output having second order cancellation is recognized by examining the form by which it is mathematically expressed. For example, the outputs listed in the Terminal 13 column having the quadratic form. 1.e.. those in which the coefficients of the terms are l. 2., 1. have second order cancellation. In further embodiments, outputs having other orders of cancellation may also be recognized by noting their form. The wellknown Pascal's triangle provides a simple mnemonic device for recognizing the form of expressions indicative of higher-order cancellation. While only half the output pulses have a second order cancellation and the other output pulses have a first order cancellation.

overall system performance IS improved in that clutter 'eiection IS significantly improved.

Referring now to FIG. 3 there is illustrated another t'orrn of the present invention connected between the input terminal 11 and the output terminal 13 including wo canceller stages and which provides a higher order of cancellation than the circuit of FIG. I. In FIG. 3, the same reference numerals are used to denote elements :orresponding to those of the circuit of FIG. 1. In the embodiment of FIG. 3. the output terminal l7 of the subtractor I5 is connected to a first input 44 of a subtractor 45 and is also coupled to a delay means 48 having an output connected to a second input 46 of the subtractor 45. The output of the subtractor 45 is connected to the output terminal 13. The second input 23 of the summing circuit 20 is again connected to one terrmnal of the switching means 25, the other terminal of which is connected to the output terminal 13. The switching means 25 is operated in the same manner as in the embodiment of FIG. 1. The switching means 25 1S closed during every third interpulse period of the radar system to provide the signals during successive tnterpulse periods as tabulated in FIG. 4. In FIG. 4, the same form of notation is used as in FIG. 3. In this embodiment, an output having third order cancellation, recognizable in the manner described above, is prolded at the output terminal 13 during every third interpulse period of the radar system while only two delay lines are utilized. Other outputs, while not being pure third order cancelled outputs. still embody greater clutter re ection than is provided by a conventional canceler stage.

ln order to provide a canceller circuit constructed in accordance with the present invention, it is not essenial to physically connect feedback from the output of .1 canceller stage to the input of a summing circuit. What is essential is that the proper signals be supplied within the canceller circuit to provide the desired outputs. More specifically, the present invention may be implemented by including in a canceller stage means for providing to the input of a delay means (e.g., the delay means 18 of FIG. I) an interrupted input which nput is equivalent to a cancelled output from the output of the canceller stage. Such means may comprise the embodiments of FIGS. 1 and 3 described above. Al- 'ernatively, in order to implement the operation of FIG. .2 in accordance with the present invention, such means could comprise a canceller stage further including means for doubling the input from a signal input termirial to a delay means and means for subtracting the output of the delay means for the input to the delay means. Both the doubling means and subtracting means would operate in an interrupted manner as does the switching means 25 of the embodiment of FIG. I. This arrangement will provide an output having second order cancellation. Similar related arrangements will suggest themselves to implement the operation illustrated in FIG. 4 or to provide other embodiments of the present invention.

It is thus seen that the present invention provides for he introduction of interrupted feedback or its equivalent in what would otherwise be a conventional canceller circuit in order to improve output signal characteristics while minimizing cost and complexity of the circuit. The interrupted feedback may be provided to produce outputs having integral orders of cancellation or to provide outputs having other forms.

What is claimed as new and desired to be secured by Letters Patent of the United States is:

1. In a radar system as canceller circuit for connection between a moving target indicator receiver providing a pulse train at a signal input terminal and moving target indicator display means, the combination comprising:

a. an output terminal for connection to said moving target indicator display means;

b. a first subtractor circuit having first and second inputs and an output coupled to said output terminal;

c. means connecting a first input of said subtractor circuit to the signal input terminal;

d. a delay means coupled between the signal input terminal and the second input of said first subtractor;

e. a summing circuit having a first input coupled to the output of said moving target indicator receiver, an output coupled to the input of said delay line, and a second input;

f. switching means coupled between the output of said first subtractor and the second input of said summing circuit, said switching means being actuatable to be closed; and

g. means for actuating said switching means during alternate interpulse periods of the inputs supplied from the said moving target indicator receiver.

2. The arrangement of claim 1 further comprising a second subtractor having first and second inputs and an output, a second delay line coupled between the output of said first subtractor and a first input of said second subtractor, a second delay line, means coupling the output of said first subtractor to a second input of said second subtractor, and means connecting the output of said second subtractor to said output terminal.

3. In a moving target indicator radar system, a canceller circuit for connection between a moving target indicator receiver and a moving target indicator display utilization means, comprising in combination:

a. a signal input terminal for connection to the output of the moving target indicator receiver;

b. an output terminal for connection to the moving 6 target indicator display means;

c. a plurality of canceller stages connected in cascade between said signal input terminal and said output terminal;

d. a summing circuit having a first input connected to said signal input terminal and an output terminal connected to the input of a delay means included in a first of said canceller stages, and a second in- P e. actuatable switching means connected between a second input of said summing circuit and said output terminal; and

f. means for actuating said switching means to close the circuit between said output terminal and the second input of said summing circuit during selected time periods.

4. The arrangement according to claim 3 wherein said means for actuating said switching means comprises means for actuating said switching means during alternate interpulse periods of the radar system.

5. In a canceller circuit, a canceller stage including delay means, and means for providing interrupted feedback from an output of said canceller stage to an input of said delay means.

6. In a canceller circuit, a plurality of canceller stages and means for providing interrupted feedback from the output of one of said canceller stages and to an input of a delay means included in another of said canceller stages. v

7. A canceller circuit comprising: a canceller stage, including delay means and further comprising means for providing to the input of said delay means an interrupted input equivalent to a cancelled output from the Output of said canceller stage.

8, A canceller circuit comprising: a plurality of canceller stages and further comprising means for providing to an input of a delay means in one of said canceller stages an interrupted input equivalent to a cancelled output from the output of another of said canceller stages. 

1. In a radar system as canceller circuit for connection between a moving target indicator receiver providing a pulse train at a signal input terminal and moving target indicator display means, the combination comprising: a. an output terminal for connection to said moving target indicator display means; b. a first subtractor circuit having first and second inputs and an output coupled to said output terminal; c. means connecting a first input of said subtractor circuit to the signal input terminal; d. a delay means coupled between the signal input terminal and the second input of said first subtractor; e. a summing circuit having a first input coupled to the output of said moving target indicator receiver, an output coupled to the input of said delay line, and a second input; f. switching means coupled between the output of said first subtractor and the second input of said summing circuit, said switching means being actuatable to be closed; and g. means for actuating said switching means during alternate interpulse periods of the inputs supplied from the said moving target indicator receivEr.
 2. The arrangement of claim 1 further comprising a second subtractor having first and second inputs and an output, a second delay line coupled between the output of said first subtractor and a first input of said second subtractor, a second delay line, means coupling the output of said first subtractor to a second input of said second subtractor, and means connecting the output of said second subtractor to said output terminal.
 3. In a moving target indicator radar system, a canceller circuit for connection between a moving target indicator receiver and a moving target indicator display utilization means, comprising in combination: a. a signal input terminal for connection to the output of the moving target indicator receiver; b. an output terminal for connection to the moving target indicator display means; c. a plurality of canceller stages connected in cascade between said signal input terminal and said output terminal; d. a summing circuit having a first input connected to said signal input terminal and an output terminal connected to the input of a delay means included in a first of said canceller stages, and a second input; e. actuatable switching means connected between a second input of said summing circuit and said output terminal; and f. means for actuating said switching means to close the circuit between said output terminal and the second input of said summing circuit during selected time periods.
 4. The arrangement according to claim 3 wherein said means for actuating said switching means comprises means for actuating said switching means during alternate interpulse periods of the radar system.
 5. In a canceller circuit, a canceller stage including delay means, and means for providing interrupted feedback from an output of said canceller stage to an input of said delay means.
 6. In a canceller circuit, a plurality of canceller stages and means for providing interrupted feedback from the output of one of said canceller stages and to an input of a delay means included in another of said canceller stages.
 7. A canceller circuit comprising: a canceller stage, including delay means and further comprising means for providing to the input of said delay means an interrupted input equivalent to a cancelled output from the output of said canceller stage.
 8. A canceller circuit comprising: a plurality of canceller stages and further comprising means for providing to an input of a delay means in one of said canceller stages an interrupted input equivalent to a cancelled output from the output of another of said canceller stages. 